Testing of Interposer-Based 2.5D Integrated Circuits by Ran Wang & Krishnendu Chakrabarty

Author:Ran Wang & Krishnendu Chakrabarty
Language: eng
Format: epub
Publisher: Springer International Publishing, Cham

2.Test patterns are applied to the interconnects in the Update_DR state. Note that some capture cells are not connected to the launch cells by interconnects, but they are connected to the C4 bumps and TSVs. Test patterns are directly applied to these capture cells by probe needles connected to the C4 bumps and TSVs. This step is used for testing V-capture.

3.All test responses are captured by the capture cells in the Capture_DR state. Note that some launch cells are not connected to capture cells through interconnects, but they are connected to the C4 bumps and TSVs. Thus, the test patterns launched by these launch cells cannot be captured by the capture cells, but they are captured by probe needles connected to the TSVs and C4 bumps. This step is used for testing V-launch.

Download

Copyright Disclaimer:
This site does not store any files on its server. We only index and link to content provided by other sites. Please contact the content providers to delete copyright contents if any and email us, we'll remove relevant links or contents immediately.